HPC Project

As the F1 racing season goes on, it becomes clearer that the shape of the cars used in F1 is evolving and can sometimes be counterintuitive. Take the BMW Sauber F1 car – the shape of the front wing and the winglets is conceived to optimize aerodynamics in a new way. The car is clearly different, and evolves between two races.

To achieve such optimization, BMW Sauber uses the services of ALBERT2, a 2048 cores (Intel Xeon) supercomputer, with a maximum power of 12,288 GigaFlops. The supercomputer is used to simulate computational fluid dynamics (CFD), using models of more than 100 million cells.

BMW Sauber is not an isolate case. Today, nearly every team that conceives its own F1 car uses a supercomputer : ING Renault F1 Team uses an Appro Xtreme-X2, 1024 sockets, 4096 cores (AMD QC Opteron)  while In the Ferrari Data Center, an Acer/IBM/Racksaver using AMD Opteron processors reduces the time of aerodynamic simulation. Each team either has its own supercomputing infrastructure or uses a partner’s.

And the 2009 season is all about supercomputing either. Intel already announced it would upgrade the existing Itanium-based system with its new Nehalem architecture (not to mention AMD upgrade to  Shanghai and Montreal architectures). However, apart from the big IT centers that host the raw computer power needed to analyze and simulate wind tunnel results, a whole ecosystem of “desktop supercomputing” is appearing. Indeed,  being able to use ‘local supercomputers’ on the track means a real competitive advantage.

Already, some companies have exclusive contracts with major F1 teams to provide very localized weather forecast services during the GP. In the future, such services could be “embedded” within the racing context. The team would also be able to analyze in real time the data collected during the race, and optimize automatically not only the race strategy, but also the physics of the car and its shape, using new materials or composite architectures.

Desktop supercomputing is not only about the race – the pre-processing and analysis of the results is always CPU intensive, and such systems can be viewed as “proxys” for large supercomputing architectures, allowing the pre-screen of the massive databases generated.

At HPC Project, we are closely monitoring such trends since being able to use, without reengineering, non parallel code on local “desktop supercomputers” could change the face of F1 engineering work. The championship is really about speed but not only about cars.

Dr Keryell has over 25 years of research and industrial experience in parallelism and high-performance computing. He holds a post-graduate degree from the Ecole Normale Superieure and a PhD in computer science. An associate professor in the Computer Science research center of the Paris École des Mines engineering school (ENSMP/CRI) and in the Telecommunication engineering school in Bretagne, Dr Keryell also worked with the computer science lab of Paris XI/ENS. Ronan Keryell is an internationally recognized  expert in compilation, code development and system-on-chip design for high-performance computing. Especially, he co-developed PIPS, a world reference automatic parallelizer and code transformation framework. He published more than 70 articles in the fields of High Performance Computing architecture, compilation & parallelization and security for High Performance Computing.

"There are very few people who have the scope of experience that Ronan has in directing science in this sector " said Pierre Fiorini, president and CEO of HPC Project."Part of the skill base he brings is his ability to understand this environment that has been moving significantly over the past ten years. Ronan has been working with the world top-level laboratories, and understands the challenges of High Performance Computing better than most researchers in the field. “

As CSO, Dr Ronan Keryell will have responsibility for planning and execution of HPC Project’s scientific objectives, and building relationships with the most advanced laboratories in the domain.